
AMD Xilinx
XC6VLX760-2FFG1760I
XC6VLX760-2FFG1760I ECAD Model
XC6VLX760-2FFG1760I Attributes
Type | Description | Select |
---|---|---|
Pbfree Code | Yes | |
Rohs Code | Yes | |
Part Life Cycle Code | Active | |
Supply Voltage-Nom | 1 V | |
Number of Inputs | 1200 | |
Number of Outputs | 1200 | |
Number of Logic Cells | 758784 | |
Combinatorial Delay of a CLB-Max | 4.29 ns | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Temperature Grade | INDUSTRIAL | |
Package Shape | SQUARE | |
Technology | CMOS | |
Clock Frequency-Max | 1.286 GHz | |
Power Supplies | 1,1.2/2.5 V | |
Supply Voltage-Max | 1.05 V | |
Supply Voltage-Min | 950 mV | |
JESD-30 Code | S-PBGA-B1760 | |
Qualification Status | Not Qualified | |
JESD-609 Code | e1 | |
Moisture Sensitivity Level | 4 | |
Operating Temperature-Max | 100 °C | |
Operating Temperature-Min | -40 °C | |
Peak Reflow Temperature (Cel) | 245 | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Number of Terminals | 1760 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | BGA | |
Package Equivalence Code | BGA1760,42X42,40 | |
Package Shape | SQUARE | |
Package Style | GRID ARRAY | |
Surface Mount | YES | |
Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) | |
Terminal Form | BALL | |
Terminal Pitch | 1 mm | |
Terminal Position | BOTTOM | |
Width | 42.5 mm | |
Length | 42.5 mm | |
Seated Height-Max | 3.5 mm | |
Ihs Manufacturer | XILINX INC | |
Part Package Code | BGA | |
Package Description | 42.50 X 42.50 MM, LEAD FREE, FBGA-1760 | |
Pin Count | 1760 | |
Reach Compliance Code | not_compliant | |
HTS Code | 8542.39.00.01 |
XC6VLX760-2FFG1760I Datasheet Download
XC6VLX760-2FFG1760I Overview
The XC6VLX760-2FFG1760I chip model is a highly advanced and powerful chip designed for use in a variety of applications. It is designed for use in high-performance, low-power systems and is capable of delivering maximum performance and efficiency. The model is designed to be used in a wide range of applications, from consumer electronics to industrial automation.
The original design intention of the XC6VLX760-2FFG1760I chip model was to provide a high-performance, low-power solution for a variety of applications. It is capable of handling large amounts of data and is capable of delivering maximum performance and efficiency. The model is designed to be used in a wide range of applications, from consumer electronics to industrial automation.
The XC6VLX760-2FFG1760I chip model can be used in a variety of advanced communication systems. It is capable of providing high-speed data transmission and is capable of providing a wide range of communication protocols. The model is also capable of providing a wide range of security protocols and is capable of providing a secure environment for data transmission.
The XC6VLX760-2FFG1760I chip model can be used in a variety of intelligent scenarios. It is capable of providing a wide range of intelligent algorithms and is capable of providing a wide range of intelligent applications. The model is also capable of providing a wide range of intelligent services and is capable of providing a secure environment for data transmission.
The XC6VLX760-2FFG1760I chip model is capable of being used in the development and popularization of future intelligent robots. It is capable of providing a wide range of intelligent algorithms and is capable of providing a wide range of intelligent applications. The model is also capable of providing a wide range of intelligent services and is capable of providing a secure environment for data transmission.
In order to use the XC6VLX760-2FFG1760I chip model effectively, it is necessary to have a good understanding of the model and its capabilities. It is also necessary to have a good understanding of the various communication protocols and security protocols that the model is capable of providing. It is also necessary to have a good understanding of the various intelligent algorithms and applications that the model is capable of providing. Finally, it is necessary to have a good understanding of the various intelligent services that the model is capable of providing. With this knowledge, it is possible to use the chip model effectively and to develop and popularize future intelligent robots.
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