
AMD Xilinx
XC7S25-1FTGB196Q
XC7S25-1FTGB196Q ECAD Model
XC7S25-1FTGB196Q Attributes
Type | Description | Select |
---|---|---|
Mfr | AMD Xilinx | |
Series | Spartan®-7 | |
Package | Tray | |
Number of LABs/CLBs | 1825 | |
Number of Logic Elements/Cells | 23360 | |
Total RAM Bits | 1658880 | |
Number of I/O | 100 | |
Voltage - Supply | 0.95V ~ 1.05V | |
Mounting Type | Surface Mount | |
Operating Temperature | -40°C ~ 125°C (TJ) | |
Package / Case | 196-LBGA, CSPBGA | |
Supplier Device Package | 196-CSBGA (15x15) | |
Base Product Number | XC7S25 |
XC7S25-1FTGB196Q Datasheet Download
XC7S25-1FTGB196Q Overview
The XC7S25-1FTGB196Q chip is a Field Programmable Gate Array (FPGA) manufactured by Xilinx. It is part of the Spartan-7 family and is a low-power, cost-effective FPGA. It is based on the 28nm process and features a 25K logic cell count with 1.2Mb of block RAM. It has a total of 196 I/O pins and comes in a 196-pin FineLine BGA package.
The XC7S25-1FTGB196Q is designed to meet the needs of low-power embedded applications, making it ideal for industrial, automotive, medical, and consumer applications. It features a wide range of I/O options, with support for LVCMOS, LVDS, and HSTL signaling standards. Additionally, it has integrated high-speed transceivers for interfacing with SERDES-based protocols such as PCIe, Ethernet, and SATA.
The XC7S25-1FTGB196Q also features a wide range of power-saving features such as Adaptive Body Bias and Adaptive Voltage Scaling. These features allow the device to operate at the lowest possible power consumption, making it ideal for battery-powered applications. It also supports Xilinx's Vivado Design Suite, allowing for fast and easy implementation of designs.
In summary, the XC7S25-1FTGB196Q is a low-power FPGA designed for embedded applications. It features a 25K logic cell count, 1.2Mb of block RAM, and 196 I/O pins in a 196-pin FineLine BGA package. It supports a wide range of I/O options, including LVCMOS, LVDS, and HSTL signaling standards, and high-speed transceivers for SERDES-based protocols. It also features power-saving features such as Adaptive Body Bias and Adaptive Voltage Scaling, and is supported by Xilinx's Vivado Design Suite.
You May Also Be Interested In
3,974 In Stock






Pricing (USD)
QTY | Unit Price | Ext Price |
---|---|---|
1+ | $38.0532 | $38.0532 |
10+ | $37.6440 | $376.4401 |
100+ | $35.5981 | $3,559.8138 |
1000+ | $33.5523 | $16,776.1340 |
10000+ | $30.6881 | $30,688.0500 |
The price is for reference only, please refer to the actual quotation! |