
AMD Xilinx
XC4013-6PQ208I
XC4013-6PQ208I ECAD Model
XC4013-6PQ208I Attributes
Type | Description | Select |
---|---|---|
Rohs Code | No | |
Part Life Cycle Code | Obsolete | |
Supply Voltage-Nom | 5 V | |
Number of Inputs | 192 | |
Number of Outputs | 192 | |
Number of Logic Cells | 576 | |
Number of Equivalent Gates | 10000 | |
Number of CLBs | 576 | |
Combinatorial Delay of a CLB-Max | 6 ns | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Temperature Grade | INDUSTRIAL | |
Package Shape | SQUARE | |
Technology | CMOS | |
Organization | 576 CLBS, 10000 GATES | |
Additional Feature | 1536 FLIP-FLOPS; TYP. GATES = 10000-13000 | |
Clock Frequency-Max | 90.9 MHz | |
Power Supplies | 5 V | |
Supply Voltage-Max | 5.5 V | |
Supply Voltage-Min | 4.5 V | |
JESD-30 Code | S-PQFP-G208 | |
Qualification Status | Not Qualified | |
JESD-609 Code | e0 | |
Moisture Sensitivity Level | 3 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Peak Reflow Temperature (Cel) | 225 | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Number of Terminals | 208 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | FQFP | |
Package Equivalence Code | QFP208,1.2SQ,20 | |
Package Shape | SQUARE | |
Package Style | FLATPACK, FINE PITCH | |
Surface Mount | YES | |
Terminal Finish | TIN LEAD | |
Terminal Form | GULL WING | |
Terminal Pitch | 500 µm | |
Terminal Position | QUAD | |
Width | 28 mm | |
Length | 28 mm | |
Seated Height-Max | 3.92 mm | |
Ihs Manufacturer | XILINX INC | |
Part Package Code | QFP | |
Package Description | PLASTIC, QFP-208 | |
Pin Count | 208 | |
Reach Compliance Code | unknown | |
HTS Code | 8542.39.00.01 |
XC4013-6PQ208I Datasheet Download
XC4013-6PQ208I Overview
The XC4013-6PQ208I chip model is a powerful and versatile tool for high-performance digital signal processing, embedded processing, and image processing. It requires the use of HDL language to be able to take full advantage of its capabilities.
The XC4013-6PQ208I chip model is well-suited for use in networks and can be applied to many intelligent scenarios. It is capable of handling complex tasks and can be used in the era of fully intelligent systems. It is an ideal choice for the development and popularization of future intelligent robots.
Using the XC4013-6PQ208I chip model effectively requires a certain level of technical knowledge and skill. It is important to understand the basics of HDL language and to be familiar with the chip model's features and capabilities. Knowledge of digital signal processing, embedded processing, and image processing is also necessary to make the most of the XC4013-6PQ208I chip model.
Overall, the XC4013-6PQ208I chip model is a powerful and versatile tool that can be used in a variety of intelligent scenarios. It is well-suited for use in networks and can be applied to the development and popularization of future intelligent robots. To use the chip model effectively, it is important to have a good understanding of HDL language, digital signal processing, embedded processing, and image processing.
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