
AMD Xilinx
XC4006-6PQ208I
XC4006-6PQ208I ECAD Model
XC4006-6PQ208I Attributes
Type | Description | Select |
---|---|---|
Rohs Code | No | |
Part Life Cycle Code | Obsolete | |
Supply Voltage-Nom | 5 V | |
Number of Inputs | 128 | |
Number of Outputs | 128 | |
Number of Logic Cells | 608 | |
Number of Equivalent Gates | 5000 | |
Number of CLBs | 256 | |
Combinatorial Delay of a CLB-Max | 6 ns | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Temperature Grade | INDUSTRIAL | |
Package Shape | SQUARE | |
Technology | CMOS | |
Organization | 256 CLBS, 5000 GATES | |
Additional Feature | 768 FLIP-FLOPS; TYP. GATES = 5000-6000 | |
Clock Frequency-Max | 90.9 MHz | |
Power Supplies | 5 V | |
Supply Voltage-Max | 5.5 V | |
Supply Voltage-Min | 4.5 V | |
JESD-30 Code | S-PQFP-G208 | |
Qualification Status | Not Qualified | |
JESD-609 Code | e0 | |
Moisture Sensitivity Level | 3 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Peak Reflow Temperature (Cel) | 225 | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Number of Terminals | 208 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | FQFP | |
Package Equivalence Code | QFP208,1.2SQ,20 | |
Package Shape | SQUARE | |
Package Style | FLATPACK, FINE PITCH | |
Surface Mount | YES | |
Terminal Finish | TIN LEAD | |
Terminal Form | GULL WING | |
Terminal Pitch | 500 µm | |
Terminal Position | QUAD | |
Width | 28 mm | |
Length | 28 mm | |
Seated Height-Max | 3.92 mm | |
Ihs Manufacturer | XILINX INC | |
Part Package Code | QFP | |
Package Description | PLASTIC, QFP-208 | |
Pin Count | 208 | |
Reach Compliance Code | unknown | |
HTS Code | 8542.39.00.01 |
XC4006-6PQ208I Datasheet Download
XC4006-6PQ208I Overview
The XC4006-6PQ208I chip model is a high-performance, low-power, and cost-effective solution for digital signal processing, embedded processing, and image processing. It is designed to offer users the flexibility and scalability required for a wide range of applications. It is also suitable for use in advanced communication systems, as it supports the use of the HDL language.
The XC4006-6PQ208I chip model was designed to meet the needs of various applications, and it has the potential to be upgraded in the future. It is equipped with advanced features that can be used to improve the performance and reduce power consumption. This chip model is also suitable for use in the development and popularization of future intelligent robots, as it can be used to create powerful and efficient systems.
In order to use the XC4006-6PQ208I chip model effectively, technical talents are needed. This includes a good understanding of the HDL language, as well as knowledge of embedded programming and digital signal processing. Additionally, those working with this chip model should have a good understanding of the architecture and design of intelligent robots, as well as the algorithms used in the development of these systems.
Overall, the XC4006-6PQ208I chip model is an excellent choice for those looking to develop high-performance digital signal processing, embedded processing, and image processing systems. It is also suitable for use in advanced communication systems and in the development of future intelligent robots. In order to use this chip model effectively, technical talents are needed, including a good understanding of the HDL language and knowledge of embedded programming and digital signal processing.
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