
AMD Xilinx
XC3064-70PP132I
XC3064-70PP132I ECAD Model
XC3064-70PP132I Attributes
Type | Description | Select |
---|---|---|
Rohs Code | No | |
Part Life Cycle Code | Obsolete | |
Supply Voltage-Nom | 5 V | |
Number of Inputs | 110 | |
Number of Outputs | 110 | |
Number of Logic Cells | 224 | |
Number of Equivalent Gates | 3500 | |
Number of CLBs | 224 | |
Combinatorial Delay of a CLB-Max | 9 ns | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Temperature Grade | INDUSTRIAL | |
Package Shape | SQUARE | |
Technology | CMOS | |
Organization | 224 CLBS, 3500 GATES | |
Additional Feature | 688 FLIP-FLOPS; TYP. GATES = 3500-4500; POWER-DOWN SUPPLY CURRENT = 170UA | |
Clock Frequency-Max | 70 MHz | |
Power Supplies | 5 V | |
Supply Voltage-Max | 5.5 V | |
Supply Voltage-Min | 4.5 V | |
JESD-30 Code | S-PPGA-P132 | |
Qualification Status | Not Qualified | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Peak Reflow Temperature (Cel) | NOT SPECIFIED | |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED | |
Number of Terminals | 132 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | PGA | |
Package Equivalence Code | PGA132,14X14 | |
Package Shape | SQUARE | |
Package Style | GRID ARRAY | |
Surface Mount | NO | |
Terminal Form | PIN/PEG | |
Terminal Pitch | 2.54 mm | |
Terminal Position | PERPENDICULAR | |
Width | 37.084 mm | |
Length | 37.084 mm | |
Seated Height-Max | 3.7338 mm | |
Ihs Manufacturer | XILINX INC | |
Part Package Code | PGA | |
Package Description | PGA, PGA132,14X14 | |
Pin Count | 132 | |
Reach Compliance Code | unknown | |
HTS Code | 8542.39.00.01 |
XC3064-70PP132I Datasheet Download
XC3064-70PP132I Overview
The XC3064-70PP132I chip model is a powerful and versatile integrated circuit that can be used in many different applications. Its main uses are in high-performance digital signal processing, embedded processing, and image processing. It is also capable of being used in the development and popularization of future intelligent robots. To use the model effectively, it requires the use of HDL language, which is a specialized language for hardware design and programming.
The XC3064-70PP132I chip model offers many advantages over other models. It is capable of high-speed processing and has low power consumption, making it ideal for applications that require high performance and low power consumption. The chip also has a high level of integration, allowing for a wide range of applications. In addition, the chip is easy to program and integrate into existing systems.
The expected demand for the XC3064-70PP132I chip model in related industries is expected to increase in the future. This is due to the increasing need for high-performance digital signal processing, embedded processing, and image processing applications. As the development and popularization of future intelligent robots continues to grow, the demand for the chip model will likely increase as well.
The XC3064-70PP132I chip model can be applied to the development and popularization of future intelligent robots. It is capable of providing the necessary processing power and low-power consumption that is needed for these applications. In order to use the model effectively, it requires the use of HDL language, which is a specialized language for hardware design and programming. Those who have experience in HDL language and understand the fundamentals of hardware design and programming will be able to use the model effectively.
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