Microchip Technology Inc
APA600-FGG676I
APA600-FGG676I ECAD Model
APA600-FGG676I Attributes
| Type | Description | Select |
|---|---|---|
| Rohs Code | Yes | |
| Part Life Cycle Code | Transferred | |
| Supply Voltage-Nom | 2.5 V | |
| Number of Inputs | 454 | |
| Number of Outputs | 454 | |
| Number of Logic Cells | 21504 | |
| Number of Equivalent Gates | 600000 | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Temperature Grade | INDUSTRIAL | |
| Package Shape | SQUARE | |
| Technology | CMOS | |
| Organization | 600000 GATES | |
| Clock Frequency-Max | 180 MHz | |
| Power Supplies | 2.5,2.5/3.3 V | |
| Supply Voltage-Max | 2.7 V | |
| Supply Voltage-Min | 2.3 V | |
| JESD-30 Code | S-PBGA-B676 | |
| Qualification Status | Not Qualified | |
| JESD-609 Code | e1 | |
| Moisture Sensitivity Level | 3 | |
| Operating Temperature-Max | 85 °C | |
| Operating Temperature-Min | -40 °C | |
| Peak Reflow Temperature (Cel) | 250 | |
| Time@Peak Reflow Temperature-Max (s) | 30 | |
| Number of Terminals | 676 | |
| Package Body Material | PLASTIC/EPOXY | |
| Package Code | BGA | |
| Package Equivalence Code | BGA676,26X26,40 | |
| Package Shape | SQUARE | |
| Package Style | GRID ARRAY | |
| Surface Mount | YES | |
| Terminal Finish | TIN SILVER COPPER | |
| Terminal Form | BALL | |
| Terminal Pitch | 1 mm | |
| Terminal Position | BOTTOM | |
| Width | 27 mm | |
| Length | 27 mm | |
| Seated Height-Max | 2.44 mm | |
| Ihs Manufacturer | MICROSEMI CORP | |
| Package Description | BGA, BGA676,26X26,40 | |
| Reach Compliance Code | compliant | |
| HTS Code | 8542.39.00.01 |
APA600-FGG676I Datasheet Download
APA600-FGG676I Overview
The APA600-FGG676I is a highly advanced and versatile chip model developed by Altera Corporation. It is a field-programmable gate array (FPGA) that is designed to meet the needs of a wide range of applications.
The APA600-FGG676I chip model is based on the Stratix 10 family of FPGAs and includes a range of features and functions. It has a total of 6,760 logic elements, each containing two logic blocks, and a total of 14,520 flip-flops. It also has 1,152 embedded memory blocks with a total of 9,216Kbits of RAM. The chip has a total of 48 multipliers and eight hard DSP blocks, as well as a range of I/O pins and an integrated transceiver.
The APA600-FGG676I is designed for high-performance computing applications. It is suitable for use in a variety of applications, such as data acquisition, image processing, embedded systems, artificial intelligence, and machine learning.
The APA600-FGG676I is a highly reliable and cost-effective chip model. It is designed to reduce power consumption and maximize performance. The chip is also designed to be compatible with a wide range of development tools, including Altera's Quartus Prime design software and the Nios II embedded processor.
Overall, the APA600-FGG676I is a powerful and versatile chip model that is suitable for a wide range of applications. It offers a range of features and functions that make it suitable for high-performance computing applications.
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1,290 In Stock
Pricing (USD)
| QTY | Unit Price | Ext Price |
|---|---|---|
| 1+ | $2,766.0758 | $2,766.0758 |
| 10+ | $2,736.3330 | $27,363.3300 |
| 100+ | $2,587.6193 | $258,761.9250 |
| 1000+ | $2,438.9055 | $1,219,452.7500 |
| 10000+ | $2,230.7063 | $2,230,706.2500 |
| The price is for reference only, please refer to the actual quotation! | ||