Microchip Technology Inc
APA600-CQ208M
APA600-CQ208M ECAD Model
APA600-CQ208M Attributes
| Type | Description | Select |
|---|---|---|
| Rohs Code | No | |
| Part Life Cycle Code | Transferred | |
| Supply Voltage-Nom | 2.5 V | |
| Number of Inputs | 158 | |
| Number of Outputs | 158 | |
| Number of Logic Cells | 21504 | |
| Number of Equivalent Gates | 600000 | |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
| Screening Level | MIL-STD-883 Class B | |
| Temperature Grade | MILITARY | |
| Package Shape | SQUARE | |
| Technology | CMOS | |
| Organization | 600000 GATES | |
| Clock Frequency-Max | 180 MHz | |
| Power Supplies | 2.5,2.5/3.3 V | |
| Supply Voltage-Max | 2.7 V | |
| Supply Voltage-Min | 2.3 V | |
| JESD-30 Code | S-CQFP-F208 | |
| Qualification Status | Not Qualified | |
| JESD-609 Code | e0 | |
| Operating Temperature-Max | 125 °C | |
| Operating Temperature-Min | -55 °C | |
| Number of Terminals | 208 | |
| Package Body Material | CERAMIC, METAL-SEALED COFIRED | |
| Package Code | GQFF | |
| Package Equivalence Code | TPAK208,2.9SQ,20 | |
| Package Shape | SQUARE | |
| Package Style | FLATPACK, GUARD RING | |
| Surface Mount | YES | |
| Terminal Finish | TIN LEAD | |
| Terminal Form | FLAT | |
| Terminal Pitch | 500 µm | |
| Terminal Position | QUAD | |
| Width | 29.21 mm | |
| Length | 29.21 mm | |
| Seated Height-Max | 3.3 mm | |
| Ihs Manufacturer | MICROSEMI CORP | |
| Package Description | GQFF, TPAK208,2.9SQ,20 | |
| Reach Compliance Code | unknown | |
| ECCN Code | 3A001.A.2.C | |
| HTS Code | 8542.39.00.01 |
APA600-CQ208M Datasheet Download
APA600-CQ208M Overview
The APA600-CQ208M is an advanced programmable array (APA) chip model that is designed for high-performance digital signal processing (DSP) applications. It features a high-performance, low-power architecture that enables it to be used in a variety of embedded applications.
The APA600-CQ208M is a single-chip solution that includes an optimized processor core, a dedicated DSP engine, and a high-speed memory interface. The processor core features a 32-bit RISC architecture with a maximum clock frequency of 200 MHz, while the DSP engine features a 32-bit fixed-point processor with a maximum clock frequency of 400 MHz. The memory interface supports DDR3 and QDRII+ memories with a maximum data rate of 1600 Mbps.
The APA600-CQ208M is an ideal solution for applications requiring high-performance DSP, such as audio and video processing, image processing, communications, and networking. It is also suitable for embedded applications such as automotive, industrial, and medical systems. The chip model is available in a 208-pin CQFP package and is RoHS compliant.
In summary, the APA600-CQ208M is an advanced programmable array chip model that is designed for high-performance digital signal processing applications. It features a 32-bit RISC processor core, a 32-bit fixed-point DSP engine, and a high-speed memory interface. It is suitable for a variety of applications, including audio and video processing, image processing, communications, and networking.
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1,945 In Stock
Pricing (USD)
| QTY | Unit Price | Ext Price |
|---|---|---|
| 1+ | $16,267.5266 | $16,267.5266 |
| 10+ | $16,092.6070 | $160,926.0697 |
| 100+ | $15,218.0088 | $1,521,800.8767 |
| 1000+ | $14,343.4106 | $7,171,705.2810 |
| 10000+ | $13,118.9731 | $13,118,973.0750 |
| The price is for reference only, please refer to the actual quotation! | ||