
Microchip Technology Inc
A3PE3000-2PQG208I
A3PE3000-2PQG208I ECAD Model
A3PE3000-2PQG208I Attributes
Type | Description | Select |
---|---|---|
Rohs Code | Yes | |
Part Life Cycle Code | Transferred | |
Supply Voltage-Nom | 1.5 V | |
Number of Inputs | 147 | |
Number of Outputs | 147 | |
Number of Logic Cells | 75264 | |
Number of Equivalent Gates | 3000000 | |
Number of CLBs | 75264 | |
Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY | |
Temperature Grade | INDUSTRIAL | |
Package Shape | SQUARE | |
Technology | CMOS | |
Organization | 75264 CLBS, 3000000 GATES | |
Clock Frequency-Max | 350 MHz | |
Power Supplies | 1.5/3.3 V | |
Supply Voltage-Max | 1.575 V | |
Supply Voltage-Min | 1.425 V | |
JESD-30 Code | S-PQFP-G208 | |
Qualification Status | Not Qualified | |
JESD-609 Code | e3 | |
Moisture Sensitivity Level | 3 | |
Operating Temperature-Max | 85 °C | |
Operating Temperature-Min | -40 °C | |
Peak Reflow Temperature (Cel) | 245 | |
Time@Peak Reflow Temperature-Max (s) | 30 | |
Number of Terminals | 208 | |
Package Body Material | PLASTIC/EPOXY | |
Package Code | FQFP | |
Package Equivalence Code | QFP208,1.2SQ,20 | |
Package Shape | SQUARE | |
Package Style | FLATPACK, FINE PITCH | |
Surface Mount | YES | |
Terminal Finish | MATTE TIN | |
Terminal Form | GULL WING | |
Terminal Pitch | 500 µm | |
Terminal Position | QUAD | |
Width | 28 mm | |
Length | 28 mm | |
Seated Height-Max | 4.1 mm | |
Ihs Manufacturer | MICROSEMI CORP | |
Package Description | FQFP, QFP208,1.2SQ,20 | |
Reach Compliance Code | compliant | |
HTS Code | 8542.39.00.01 |
A3PE3000-2PQG208I Datasheet Download
A3PE3000-2PQG208I Overview
The A3PE3000-2PQG208I chip model is a high-performance, low-power Field Programmable Gate Array (FPGA) from Altera Corporation. This FPGA is based on the company’s 28nm Triple-Oxide Technology, which offers high-speed, low-power performance. The chip model has a total of 2,048 logic elements, which can be used to implement complex logic functions. It also has 8,192 Kbits of embedded memory, and 144 user I/O pins.
The FPGA is designed for use in a variety of applications, including communications, industrial automation, medical imaging, and multimedia. It can be used to implement a wide range of digital signal processing (DSP) functions, such as video and audio processing, image recognition, and data encryption. It is also suitable for use in high-speed networking applications, as it can handle data rates up to 800 Mbps.
The A3PE3000-2PQG208I chip model has a very low power consumption of just 0.4 watts, making it ideal for applications that require energy efficiency. It also has a wide operating temperature range of -40°C to +85°C, which makes it suitable for use in extreme environments. The chip model also has on-chip ECC and parity protection, which helps ensure reliable operation in the most demanding applications.
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Pricing (USD)
QTY | Unit Price | Ext Price |
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