GAL26V12C-20LJI

The GAL26V12C-20LJI is an advanced high-density, low-power, and low-cost programmable logic device (PLD) designed by Lattice Semiconductor. It is based on the GAL26V12 architecture and consists of up to 12 macrocells, each of which contains 4 product terms and 16 flip-flops. The device is fabricated using a 0.35um CMOS process and is available in a 20-pin PLCC package.

The GAL26V12C-20LJI has a maximum operating frequency of up to 25 MHz and a maximum pin-to-pin delay of 10 ns. It also features a low-power standby mode and a low-voltage operation of 2.0 V to 5.5 V. The device also includes a built-in oscillator, which can provide a clock frequency up to 25 MHz. In addition, it has an in-system programmable (ISP) feature, which allows for configuration of the device without the need for an external programmer.

The GAL26V12C-20LJI is suitable for a variety of applications, such as communication and networking, automotive, industrial, and consumer electronics. It is also used in applications requiring low-cost, low-power, and high-density logic, such as logic gates, programmable logic controllers (PLCs), and digital signal processors (DSPs). The device is also suitable for applications requiring low-power operation, such as battery-powered devices and portable electronic devices.